• 新星 [they/them/🏳️‍⚧️]
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    9 months ago

    It doesn’t have NSA backdoors in the design

    RISC-V is an architecture like ARM. What are you going to do, put a backdoor in the add instruction?

    • nephs
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      9 months ago

      Exactly. An add instruction, or any instruction needs to be carried out in steps within the hardware. Sometimes there’s systematic bugs in these implementations that can be exploited.

      Plus, it’s an open architecture where those bugs can be exposed and fixed. Where in Intel/arm based architectures, they can be rolled out to the world and be used by those in the know.

      Eg: https://www.techrepublic.com/article/is-the-intel-management-engine-a-backdoor/

      • ShiningWing
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        9 months ago

        RISC-V being open doesn’t mean all implementations using it have to be, though

        There’s nothing stopping a manufacturer from putting their own Intel Management Engine equivalent in a RISC-V CPU

        • nephs
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          9 months ago

          You are correct. I though it was copyleft GPL something.

          Thanks for bringing it into my attention. :)

        • idahocom
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          9 months ago

          The simplest risc-v implementations don’t need microcode at all.

    • idahocom
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      9 months ago

      There’s likely a lot of backdoors in x86 microcode.